Transistorized power inverters typically include one or more inverter legs or branches coupled to a DC power source. Each leg includes a pair of switches which are alternately operated to connect the junction therebetween to the voltages developed by the DC source to in turn produce an alternating phase output.
In such an inverter, it is important that one of the power switches be fully turned off before the other is turned on to prevent shorting of the DC power source. Such a condition, commonly called "shootthrough" or "cross conduction" can result in a degradation of the output waveform or even destruction of one or both of the transistors.
One prior attempt at minimizing the possibility of shoot-through in an inverter circuit is disclosed in Stobbe et al U.S. Pat. No. 4,126,819. This patent discloses the use of current sensors, such as resistors, coupled in series with the emitter electrode of each of a plurality of power transistors. The voltage across each current sensor is coupled through a driver circuit to the base of the complementary transistor in the inverter leg so that one transistor is maintained in an off condition while the other transistor is conducting current above a specified level.
Other patents disclosing circuits for maintaining one transistor in an inverter leg in an off condition until a specified condition is reached by a complementary transistor in the inverter leg are Gritter U.S. Pat. No. 4,371,824, Rosswurm et al U.S. Pat. No. 4,342,076, and Kelleher U.S. Pat. No. 3,828,208.
None of the above-noted patents discloses a simple and completely satisfactory circuit for preventing cross conduction or shoot-through. For example, the use of a resistor as a current sensor in the collector-emitter circuit of the Stobbe et al patent reduces the maximum switching frequency which can be attained and results in an undesirable power loss. Further, such current sensors undesirably affect the ability of a snubber circuit connected across the collector and emitter electrodes of each power transistor to dissipate transients caused by switching of the transistors.
A somewhat different approach to a solution of this problem is disclosed in Simmons U.S. Pat. No. 4,155,133. This patent discloses a circuit which prevents overlapping operation of transistors in an inverter by providing a fixed time delay between the base drive commands which are ultimately coupled to the inverter transistors. The Simmons circuit includes a pair of switching amplifiers that control the conduction of the series-connected power switches in each leg of the inverter in accordance with first and second driving pulses. The driving pulses are coupled to the inputs of the switching amplifiers through delay networks. The time constants of the delay networks are selected so that that there is a predetermined length of time between removal of base drive from one switch and application of base drive to the other switch, which duration is at least as great as the charge storage time of the transistors and less than half the duration of the drive pulses.
However, Simmons does not sense the outputs of the switching amplifiers to determine when the application of base drive to one of the transistors has been terminated, and hence there is no guarantee in the event of a malfunction that the base drive from one transistor has been removed before another transistor is driven into conduction.
Further, the Simmons system relies on complex delay circuits and is generally expensive to implement.
A still further circuit for preventing shootthrough in an inverter is disclosed in Glennon U.S. application Ser. No. 687,204, filed Dec. 28, 1984, entitled "Transistor Inverter Interlock Circuit" and assigned to the assignee of the instant application. This application discloses an interlock circuit which includes means for generating a gating signal when the voltage across two electrodes of one of a pair of series-connected power switches reaches a selected level indicative of turn-off of such switch and means for inhibiting turn-on of the complementary switch until the gating signal is generated.